Phase-locked loops (PLLs) are widely used to generate an output signal having a phase and frequency related to that of an input signal. The voltage-controlled oscillator (VCO) of a PLL typically operates at a much higher frequency than the frequency of the input signal. Hence, the VCO of a PLL is typically designed using CMOS technology devices which support very high switching frequencies, e.g., in the GHz range or above. Such devices often have a relatively low operating voltage, e.g., 0.9V or lower to support such high switching frequencies. The charge pump tends to operate at a much lower frequency range, e.g., in the MHz range, and therefore is typically designed using devices having a higher operating voltage, e.g., 1.8V or higher so as to reduce noise sensitivity. For example, in automotive Radar systems which operate in the 76 to 81 GHz frequency range, an analog PLL is typically used to generate the frequency ramp. The VCO must cover a bandwidth of 4 GHz. The phase noise contributed by the loop filter of the PLL can be dominant, mainly because of the high VCO gain. These challenges increase the difficulty in designing a PLL with good noise performance, since the voltage range of the VCO is relatively small and noise performance becomes more important.
BiCMOS technology may be employed to integrate the charge pump, loop filter and VCO components of a PLL on the same die (chip). BiCMOS technology provides high frequency devices for the implementation of the VCO, but at a relatively higher supply voltage compared to low voltage CMOS technologies. In this case, the VCO gain is reduced and the phase noise contributed by loop filter is not dominant, although still important. This approach, however, is not compatible with low voltage CMOS technologies.
The phase noise contributed by the loop filter instead can be reduced by impedance scaling, i.e., by increasing the size of the capacitors and proportionally decreasing the size of the resistors included in the loop filter. With this approach, excessive capacitance area is needed to ensure the phase noise contributed by the loop filter remains at a satisfactory level below the VCO phase noise.
Hence, there is a need for an improved solution for integrating the charge pump, loop filter and VCO components of a PLL.